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Low current Zs test tripping RCBO

Sparkymania
Hi


Have a question about RCD testing. I'm not new to testing and have been doing it for quite a few years now but have come across something that has never happened before.


On Zs testing a circuits on a DB with all RCBOs every one of them trip on a 2 wire low test. I didn't find this out until I did the lighting as the sockets use 3 wire and I allow the default selection of 3 wire low. Using Megger MFT. All 3 lighting circuits did this. I used a 3 wire low (using 3 probes) and they didn't trip. I tried the socket circuits on 2 wire low and they did trip.

All load turned off.


I'm guessing the use of the neutral in the test allows some balancing current through the RCBO but then I don't know the technical differences between 2 and 3 wire low test and can't find any details on it anywhere. I suspect, even if I could find it it may go into so much detail it would go over my head.


The question is why are they tripping? No Load. IR tests all >999. 


Anyone got any Ideas?


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  • 0

    Still can't see how 15mA L-N is tripping all the RCBOs on the 2 wire though.



    I suspect it's actually pulses that peak at a something above 15mA - but short enough to be 'sort of equivalent' to <15mA r.m.s. when viewed over a fair chunk of the waveform. Traditional RCD designs were easily fooled by such tricks, but some of the newer designs (intended to be more sensitive to pulsed residual currents) can spot the pulse and trip.


    In some ways its sounding like a re-run of the D-loc problems - some earlier RCD testers added a large d.c. component to the loop test current to 'lock out' traditional RCD designs (by saturating the torroid) and so stop them tripping when the large loop test current flowed - but some designs (even though they were nominally still "AC" RCD types) weren't fooled and tripped anyway.


       - Andy.
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  • 0

    Still can't see how 15mA L-N is tripping all the RCBOs on the 2 wire though.



    I suspect it's actually pulses that peak at a something above 15mA - but short enough to be 'sort of equivalent' to <15mA r.m.s. when viewed over a fair chunk of the waveform. Traditional RCD designs were easily fooled by such tricks, but some of the newer designs (intended to be more sensitive to pulsed residual currents) can spot the pulse and trip.


    In some ways its sounding like a re-run of the D-loc problems - some earlier RCD testers added a large d.c. component to the loop test current to 'lock out' traditional RCD designs (by saturating the torroid) and so stop them tripping when the large loop test current flowed - but some designs (even though they were nominally still "AC" RCD types) weren't fooled and tripped anyway.


       - Andy.
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