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AMD 2 - high protective conductor currents

AJJewsbury
It looks like the DPC is suggesting a number of changes to section 543.7 - the bit about having to deal with protective conductor currents between 3.5mA and 10mA seems to have gone, likewise 543.7.1.202 (ii) (b) which allowed small c.p.c.s in flexes provided there were no smaller than that of the line conductor.


The bit I found most surprising though was the deletion of 543.7.1.204 - which required duplicate c.p.c.s to be terminated independently of each other - as I always thought that a very sensible requirement as terminations seem to be the source of the majority of problems and there seemed little point to me in having duplicate c.p.c.s if they can both be disabled by the same loose connection. Does anyone have any insight into why such a change is being proposed?


   - Andy.
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    I suppose it is accepting that currents between 3.5 mA and 10mA are becoming the norm and that strengthening of the RCD requirement for all socket outlets up to 32A puts an upper limit on the amount of current permissible before tripping occurs.

    The deletion of 543.7.1.204 could be viewed as being driven by manufacturers not wanting to put an extra terminal on their accessories. But connecting the two protective conductor circuits could be done using a couple of connectors in the enclosure and a couple of flyleads to the faceplate earth terminal, getting rid of the 1 point of failure for both circuits.
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    I suppose it is accepting that currents between 3.5 mA and 10mA are becoming the norm and that strengthening of the RCD requirement for all socket outlets up to 32A puts an upper limit on the amount of current permissible before tripping occurs.

    The deletion of 543.7.1.204 could be viewed as being driven by manufacturers not wanting to put an extra terminal on their accessories. But connecting the two protective conductor circuits could be done using a couple of connectors in the enclosure and a couple of flyleads to the faceplate earth terminal, getting rid of the 1 point of failure for both circuits.
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