in summary they break or at least start to arc so there is some voltage drop, in less than a half cycle of the AC mains, such that the let through energy is no worse than (in the case of 50Hz) as if the PSSC had only flowed for 10msec.
In general the B, C and D breakers are not guaranteed to do this, but most will do so to some extent in practice. Makers device specific data is needed to see the I2t trends beyond the minimum 0.1second called out by the Euronorms
in summary they break or at least start to arc so there is some voltage drop, in less than a half cycle of the AC mains, such that the let through energy is no worse than (in the case of 50Hz) as if the PSSC had only flowed for 10msec.
In general the B, C and D breakers are not guaranteed to do this, but most will do so to some extent in practice. Makers device specific data is needed to see the I2t trends beyond the minimum 0.1second called out by the Euronorms
