Perhaps a rather rudimentary question but what is “full mode” protection? I assume that it is a combination of common and differential modes but it seems to me that it is generally common mode that is provided.
In reality current just flows, and to divide it into common or differential mode is a convenient mathematical simplification, however when the SPD breaks over during a transient, it is indeed all about where the current goes first.
'all mode' in this context means that current can get round during an over-voltage between any pair of wires LLLNE .
All tests are really examples of common mode, after a fashion, but the choice of wires for the pair to be stimulated varies, and some documents apply a mythical status too the PE/CPC.
Never shown on the simple drawings is the fact that earth is not a potential, nor an infinite source and sink of current with no voltage variation, in reality it is just another wired connection, and one with considerable time delay and inductance as far as pulses of a few microsecond duration are concerned.
The test waveform is 8uS rise, 20uS fall, and the SPD itself must pass either 10 or 20kA peak, and at no time drop more than 1.2kV across its terminals, however real pulses come in all shapes and sizes, some much shorter, some much longer, and in higher and lower currents. The ones that are longer and in higher currents usually lead to SPD failure...
In reality current just flows, and to divide it into common or differential mode is a convenient mathematical simplification, however when the SPD breaks over during a transient, it is indeed all about where the current goes first.
'all mode' in this context means that current can get round during an over-voltage between any pair of wires LLLNE .
All tests are really examples of common mode, after a fashion, but the choice of wires for the pair to be stimulated varies, and some documents apply a mythical status too the PE/CPC.
Never shown on the simple drawings is the fact that earth is not a potential, nor an infinite source and sink of current with no voltage variation, in reality it is just another wired connection, and one with considerable time delay and inductance as far as pulses of a few microsecond duration are concerned.
The test waveform is 8uS rise, 20uS fall, and the SPD itself must pass either 10 or 20kA peak, and at no time drop more than 1.2kV across its terminals, however real pulses come in all shapes and sizes, some much shorter, some much longer, and in higher and lower currents. The ones that are longer and in higher currents usually lead to SPD failure...
