Sizing of protective conductors - what am I missing here

Scrambled said:

Why is it ok that potentially I could have a conductor with a K2S2 less than the I2T of the protective device in the case of a 1mm2/1mm2 cable just because it has been selected rather than calculated?

You can't ... for both L-N and L-E faults, the cable must be protected by the protective device.

I think you may be confusing the differentiation within "overcurrent protection" between "overload" and "fault current" protection ? Both sets of requirements must be satisfied.

Apologies for the confusion Graham thanks for coming back to me. I'm familiar with the difference between overload and fault. When I referenced the overload consideration I was referring to this in the design guide.

followed by this... which seems to suggest that if the overcurrent protective device is ok for overload protection to a conductor correctly coordinated with the Iz of the conductor then the adiabatic equation will be satisfied for fault protection... which then takes me back to my original question of how that could be in the example if the fault current level were at a point where the K2S2 was less than the I2T of the device... because by selection it would all appear suitable unless the 1mm conductor happened to be the cpc of a 1.5mm cable. Hopefully that's a bit clearer!

followed by this... which seems to suggest that if the overcurrent protective device is ok for overload protection to a conductor correctly coordinated with the Iz of the conductor then the adiabatic equation will be satisfied for fault protection... which then takes me back to my original question of how that could be in the example if the fault current level were at a point where the K2S2 was less than the I2T of the device... because by selection it would all appear suitable unless the 1mm conductor happened to be the cpc of a 1.5mm cable. Hopefully that's a bit clearer!

This situation can be a bit tricky, and whilst the design guide is quite correct in what it says the real outcomes of faults may not be that which you expect. The real problem is that faults are not discussed as "credible faults". The situation you have described can happen on much larger cables too, typically on the connections to large transformers where potential fault currents may be very high, typically 100kA at the transformer terminals. It is particularly difficult when several cables are used in parallel, as only one of them will be subject to the fault (Earth) current.

Is it credible that a T&E cable becomes faulty, but not damaged within a short distance of the circuit breaker? Once you have a metre of 1mm2 cable the potential fault current has fallen to a much lower level, and your cable is safe. If it does develop a short circuit or Earth fault close to the breaker then it will need to be replaced anyway, so some overtemperature damage is acceptable. As you have noticed the k2s2 may be exceeded at some small range of fault current but not elsewhere, what is the effect of this? It is simply that the conductor temperature will rise somewhat more than the normal limits during the fault. The position of this fault on the cable can be calculated and may be very short but how realistic is this calculation? How many assumptions have you made about PSCC, fault resistance (zero?), and ambient temperature.

I know that many people will argue with my point, but it is the difference between reality and theory. The number of circuits that any experienced person has ever seen with the scenario after a fault you are discussing is probably zero, simply because it doesn't happen, although it is possible. The figures you are using are all "worst possible case", the I2t, the cable temperature, almost zero length, the artificial temperature limit for the Earth conductor (chosen to remove any possibility of fire) etc.

If you analyze the zero-length fault cable sizes for many installations you will find that there are non-compliances, but short circuits inside distribution boards are very unusual, probably unknown unless mechanical damage has occurred. Loose connections are much more common and may lead to fires because the heat is sustained and may be very high, red hot terminals are quite common.

Ah, I see now where you are coming from.

I will have to think carefully about this, but my initial thought that there is a qualification which may be missing from Section 8.1.2 in EIDG, which is present in the regulation it refers to.

The reality is that, Regulation 435.1 requires you to check adiabatic (Regulation 434.5.2) for the live conductors, regardless of whether they are protected for overload, and if you've already done that, a cpc of the same size is already protected.

435.1 Protection afforded by one device
A protective device providing protection against both overload current and fault current shall fulfil the requirements of the relevant regulations in Sections 433 and 434.

Except as required by Regulation 434.4 or 434.5.2, where an overload protective device complying with Regulation 433.1 is to provide fault current protection and has a rated short-circuit breaking capacity not less than the value of the maximum prospective fault current at its point of installation, it may be assumed that the requirements of this section are satisfied as regards fault current protection of the conductors on the load side of that point.

The validity of the assumption shall be checked, where there is doubt, for conductors in parallel and for certain types of circuit-breaker e.g. non-current-limiting types.

So I think you are correct, it doesn't make sense, and it's not simply the case that conductors are protected against fault current just because the protective device protects them against overload current, and this is particularly true of circuit-breakers because of the transition between thermal and magnetic characteristic, or with non-current-limiting circuit-breakers.

... I will come back to this thread to confirm.

Thanks Graham. Having followed through those regulations it makes perfect sense as far as BS7671 goes... ie. that as you originally said the i2t can't exceed the k2s2 - so that does solve the discrepancy in my head regarding what is commonly taught practice and indeed the design guide is saying. Just checked the most up to date design guide and again under fault protection the same statement is made with no visible qualification to it.

David whilst I appreciate we might be talking about an unlikely event - nonetheless BS7671 doesn't really permit us to make that decision as far as I can tell for a circuit unless we can call into effect 434.3 which might be a bit of an ask in terms of general compliance when designing a circuit. I appreciate that there is the real world and BS7671 land but even so.... Even as a hypothetical it's nice to clarify! Thanks anyway!

Scrambled said:

Just checked the most up to date design guide and again under fault protection the same statement is made with no visible qualification to it

Thank you. I have already fed this discussion back, so if any clarification is required, it can be added.