Adequate protection of balanced 3P Circuit , no neutral , no cpc

Hello - we have an installation that is proposing to use multiple sets of LV AC in parallel, terminated at at ACB at load side and taken directly from a transformer at supply side. What is the best way of protecting the cable where the TX does not include a neutral / earth point so there is no cpc. 

Plan is to install using unarmored single core cables run in trefoil.

How could we adequately monitor / protect these cables? 

Would an IMD device be ineffective as there is no earth fault return path for the AC circuit that is running in i.e. no cpc dedicated or armoured or is it still possible to place an IMD monitoring each phase and provide a dedicated earthing connection for the IMD only? 

What other options for protection are available in this scenario? 

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  • Dyn11 TX

    In addition to Mike's points above, there's also a potential issue with capacitive coupling between the HV and LV windings of a transformer - if the secondary isn't earthed the whole secondary side can be dragged up to some significant proportion of the HV potential - not much current behind that of course, but it can put a lot of stress on the secondary insulation (as it's several kV from Earth, referenced to Earth via the HV system). As I understand it transformers intended for IT systems will often incorporate an earthed screen between the windings or something similar to mitigate those risks, but it's something to be aware of if you're trying to create your own IT system off the back of an ordinary transformer intended to normally supply TN systems.

        - Andy.

  • thanks, yes this makes sense as there will always be the inherent capacitance on the LV side in the IT system. Think 442.2 & Table 44.1 make sense in this context as well as 44.2. 

    One additional query that is coming to mind is that at the AC ACB we would have SPD's . aside from rating these at a L-L voltage to cover continuous operation under a first fault. are there any key considerations for SPD's in this position ?

    in terms of wiring diagram / how this will look i am thinking Fig16A4 for position of the SPD.  



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  • thanks, yes this makes sense as there will always be the inherent capacitance on the LV side in the IT system. Think 442.2 & Table 44.1 make sense in this context as well as 44.2. 

    One additional query that is coming to mind is that at the AC ACB we would have SPD's . aside from rating these at a L-L voltage to cover continuous operation under a first fault. are there any key considerations for SPD's in this position ?

    in terms of wiring diagram / how this will look i am thinking Fig16A4 for position of the SPD.  



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